Abstract
A 2 × 2 array of 280-GHz Schottky-barrier diode detectors with an on-chip patch antenna (255×250 μ m2 ) is fabricated in a 130-nm logic CMOS process. The series resistance of diode is minimized using poly-gate separation (PGS), and exhibits a cut-off frequency of 2 THz. Each detector unit can detect an incident carrier with 100-Hz ∼ 2-MHz amplitude modulation. At 1-MHz modulation frequency, the estimated voltage responsivity and noise equivalent power (NEP) of the detector unit are 250 V/W and 33 pW/Hz1/2 , respectively. An integrated low-noise amplifier further boosts the responsivity to 80 kV/W. At supply voltage of 1.2 V, the entire chip consumes 1.6 mW. The array occupies 1.5×0.8 mm2. A set of millimeter-wave images with a signal-noise ratio of 48 dB is formed using the detector. These suggest potential utility of Schottky diode detectors fabricated in CMOS for millimeter wave and sub-millimeter wave imaging.
| Original language | English |
|---|---|
| Article number | 6031779 |
| Pages (from-to) | 2602-2612 |
| Number of pages | 11 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 46 |
| Issue number | 11 |
| DOIs | |
| State | Published - Nov 2011 |
ASJC Scopus Subject Areas
- Electrical and Electronic Engineering
Keywords
- CMOS
- detector
- imaging
- NEP
- on-chip patch antenna
- responsivity
- Schottky barrier diode
- terahertz