Candidate Subcircuits for Functional Module Identification in Logic Circuits

Jennifer L. White, Anthony S. Wojcik, Moon-Jung Chung, Travis E. Doom

Research output: Contribution to conferencePresentation

Abstract

Recovering functional information from existing hardware is a difficult problem in design automation. However, it is an important focus for designers attempting to redesign for expanded functionality or superior performance. Often, the only reliable information available about a piece of digital hardware is the hardware itself. Documentation, even if it is available, may be outdated or incorrect. Existing procedures are able to recover the transistor-level netlist, or a gate-level netlist from an existing implementation. The next step in this process is the gate-level to module-level transformation, the focus of this paper. We have designed a technique to enumerate all of the potential modules within a gate-level netlist so that their functional equivalence to known modules may be evaluated.

Original languageAmerican English
DOIs
StatePublished - Mar 1 2000
EventProceedings of the 10th Great Lakes Symposium on VLSI -
Duration: Mar 1 2000 → …

Conference

ConferenceProceedings of the 10th Great Lakes Symposium on VLSI
Period3/1/00 → …

Disciplines

  • Computer Sciences
  • Engineering

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