Abstract
The problem of finding meaningful subcircuits in a logic layout appears in many contexts in computer-aided design. Existing techniques rely upon finding exact matchings of subcircuit structure within the layout. These syntactic techniques fail to identify functionally equivalent subcircuits which are differently implemented optimized, or otherwise obfuscated. We present a mechanism for identifying functionally equivalent subcircuits which is capable of overcoming many of these limitations. Such semantic matching is particularly useful in the field of design recovery.
Original language | American English |
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Title of host publication | Proceedings of the IEEE Great Lakes Symposium on VLSI |
Publisher | IEEE |
Pages | 313-318 |
Number of pages | 6 |
ISBN (Print) | 0-8186-8409-7 |
DOIs | |
State | Published - Aug 6 2002 |
Event | Proceedings of the 1998 8th Great Lakes Symposium on VLSI - Lafayette, LA, USA Duration: Feb 19 1998 → Feb 21 1998 |
Conference
Conference | Proceedings of the 1998 8th Great Lakes Symposium on VLSI |
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City | Lafayette, LA, USA |
Period | 2/19/98 → 2/21/98 |
ASJC Scopus Subject Areas
- Electrical and Electronic Engineering
Keywords
- Combinational circuits
- Logic design
- Design automation
Disciplines
- Computer Sciences
- Engineering