In-situ stress state measurements during chip-on-board assembly

Yida Zou; Jeffrey C. Suhling; R. Wayne Johnson; Richard C. Jaeger; A. K.M. Mian

doi:10.1109/6104.755088

In-situ stress state measurements during chip-on-board assembly

Yida Zou, Jeffrey C. Suhling, R. Wayne Johnson, Richard C. Jaeger, A. K.M. Mian

Wright State University

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	38-52
Number of pages	15
Journal	IEEE Transactions on Electronics Packaging Manufacturing
Volume	22
Issue number	1
DOIs	https://doi.org/10.1109/6104.755088
State	Published - Jan 1 1999

ASJC Scopus Subject Areas

Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

Disciplines

Engineering
Materials Science and Engineering
Mechanical Engineering

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10.1109/6104.755088

Cite this

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title = "In-situ stress state measurements during chip-on-board assembly",

author = "Yida Zou and Suhling, {Jeffrey C.} and {Wayne Johnson}, R. and Jaeger, {Richard C.} and Mian, {A. K.M.}",

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AU - Suhling, Jeffrey C.

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AU - Mian, A. K.M.

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In-situ stress state measurements during chip-on-board assembly

ASJC Scopus Subject Areas

Disciplines

Access to Document

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