Low-loss on-chip transmission lines with micro-patterned artificial dielectric shields

Y. Ma, B. Rejaei, Y. Zhuang

Research output: Contribution to journalLetterpeer-review

Abstract

Low-loss coplanar waveguide (CPW) transmission lines integrated on a standard (5-10 Ω · cm) silicon substrate are realised by using an artificial dielectric shield with a very high in-plane dielectric constant. The shield consists of a 30 nm-thick Al2O3 film sandwiched by two 100 nm-thick aluminium layers patterned into lattices of μm-size elements. The individual metallic elements are micro-patterned to suppress the flow of eddy currents at microwave frequencies. Inserted below the CPW, the shield blocks the electric field of the line from entering the silicon substrate. The resulting line attenuation (measured up to 25 GHz) is comparable to that of identical CPWs built on a high-resistivity silicon wafer.
Original languageEnglish
Pages (from-to)913-915
Number of pages3
JournalElectronics Letters
Volume44
Issue number15
StatePublished - Jul 17 2008

ASJC Scopus Subject Areas

  • Electrical and Electronic Engineering

Keywords

  • Transmission lines
  • Artifical dielectric shields

Disciplines

  • Electrical and Computer Engineering

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