Self-Aligned Complementary GaAs MISFETs Using a Low-Temperature-Grown GaAs Gate Insulator

C. L. Chen, L. J. Mahoney, K. B. Nichols, E. R. Brown

Research output: Contribution to journalArticlepeer-review

Abstract

GaAs complementary metal insulator semiconductor field effect transistors (MISFETs) with a low temperature grown GaAs gate insulator were fabricated using the same epitaxial layer structure. Self-aligned Si and Be implants were used for the source/drain region in n- and p-channel MISFETs. respectively. With a 1.5μm gate length, the maximum drain current is 40 and 120mA/mm for a normally-off n- and p-channel MISFET, respectively. It increases to 500mA/mm for a normally-on n-channel device.
Original languageEnglish
Pages (from-to)407-409
Number of pages3
JournalElectronics Letters
Volume32
Issue number4
DOIs
StatePublished - Feb 15 1996

ASJC Scopus Subject Areas

  • Electrical and Electronic Engineering

Keywords

  • Gallium arsenide
  • MISFET

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